iPerlST component dated 160304, ver.2.4.255.

This commit is contained in:
Milan Hanajik
2016-04-04 11:26:12 +02:00
parent 45c6c10755
commit 2a3f76c3dc
11 changed files with 115 additions and 92 deletions
@@ -66,7 +66,7 @@ namespace TBF.BenchControl.Elde
public ulong DigitalInputs { get { return 0; } }
public float AnalogInput(int adcNr0) { return 0; }
public uint AnalogInputRaw(int adcNr0, int bank) { return 0; } /// bank0=RV, bank1=Temp
public float ReferenceVolume { get { return 0; } }
public float TotalRefVolume { get { return 0; } }
public float VyslExt(int wmNr0, int what) { return 0; }
public void SetWeight(int pos, float mass) { return; } /// not available in sim. mode
@@ -89,6 +89,7 @@ namespace TBF.BenchControl.Elde
ulong route;
public ulong Route { get { return route; } }
int totalRefPulses;
int massRefPulses;
TestMethods testMethods;
float filterConstant;
float[] FMFreq;
@@ -147,28 +148,24 @@ namespace TBF.BenchControl.Elde
/// <param name="regConst">Coefficient used to control reg. valves (1..100)</param>
/// <param name="shortImp">0 = default value, 1 = spec. processing of very short pulses</param>
/// <param name="stopDevs">What to stop</param>
public void SendCommand(Command cmd, int refFlowmtrNr, ulong route, int totalRefPulses, TestMethods testMethods,
public void SendCommand(Command cmd, int refFlowmtrNr, ulong route,
int totalRefPulses, int massRefPulses, TestMethods testMethods,
float filterConstant, float[] fmFreq, int regConst, int shortImp, StopDevs stopDevs)
{
log.InfoFormat("SendCommand(cmd={0}, ref={1}, route={2} {3} {4} {5}, pulses={6}, TM={7}, filt={8}, pumpFM=[{9}{10}{11}{12}{13}{14}], reg={15}, shrtImp={16}, stop={17})",
cmd,
refFlowmtrNr,
((route >> 48) & 0xFFFF).ToString("X4"),
((route >> 32) & 0xFFFF).ToString("X4"),
((route >> 16) & 0xFFFF).ToString("X4"),
(route & 0xFFFF).ToString("X4"),
totalRefPulses,
testMethods,
filterConstant,
fmFreq[0].ToString(),
(fmFreq.Length > 1) ? ("," + fmFreq[1].ToString()) : "",
(fmFreq.Length > 2) ? ("," + fmFreq[2].ToString()) : "",
(fmFreq.Length > 3) ? ("," + fmFreq[3].ToString()) : "",
(fmFreq.Length > 4) ? ("," + fmFreq[4].ToString()) : "",
(fmFreq.Length > 5) ? ("," + fmFreq[5].ToString()) : "",
regConst,
shortImp,
stopDevs);
log.InfoFormat("SendCommand(Cmd={0},Ref#={1},Route={2} {3} {4} {5},TotalPls={6},MassPls={7},TstM={8},filt={9},FM=[{10}{11}{12}{13}{14}{15}],Reg={16},ShrtImp={17},Stop={18})",
cmd, refFlowmtrNr, /// 0, 1
((route >> 48) & 0xFFFF).ToString("X4"), /// 2
((route >> 32) & 0xFFFF).ToString("X4"), /// 3
((route >> 16) & 0xFFFF).ToString("X4"), /// 4
(route & 0xFFFF).ToString("X4"), /// 5
totalRefPulses, massRefPulses, testMethods, filterConstant, /// 6, 7, 8, 9
fmFreq[0].ToString(), /// 10
(fmFreq.Length > 1) ? ("," + fmFreq[1].ToString()) : "", /// 11
(fmFreq.Length > 2) ? ("," + fmFreq[2].ToString()) : "", /// 12
(fmFreq.Length > 3) ? ("," + fmFreq[3].ToString()) : "", /// 13
(fmFreq.Length > 4) ? ("," + fmFreq[4].ToString()) : "", /// 14
(fmFreq.Length > 5) ? ("," + fmFreq[5].ToString()) : "", /// 15
regConst, shortImp, stopDevs); /// 16, 17, 18
///
/// Simulation
///
@@ -191,6 +188,7 @@ namespace TBF.BenchControl.Elde
TestBenchSim.RouteSim = route;
this.totalRefPulses = totalRefPulses;
this.massRefPulses = massRefPulses;
this.testMethods = testMethods;
this.filterConstant = filterConstant;
this.FMFreq = fmFreq;